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STMicroelectronics STM32F05 series - Figure 206. Transfer Sequence Flowchart for Slave Receiver with NOSTRETCH=0

STMicroelectronics STM32F05 series
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RM0091 Inter-integrated circuit (I
2
C) interface
Doc ID 018940 Rev 1 485/742
Slave receiver
RXNE is set in I2Cx_ISR when the I2Cx_RXDR is full, and generates an interrupt if RXIE is
set in I2Cx_CR1. RXNE is cleared when I2Cx_RXDR is read.
When a STOP is received and STOPIE is set in I2Cx_CR1, STOPF is set in I2Cx_ISR and
an interrupt is generated.
Figure 206. Transfer sequence flowchart for slave receiver with NOSTRETCH=0
MS19855V1
Slave initialization
Slave reception
Read ADDCODE and DIR in I2Cx_ISR
Set I2Cx_ICR.ADDRCF
Write I2Cx_RXDR.RXDATA
I2Cx_ISR.ADDR
=1?
No
Yes
I2Cx_ISR.RXNE
=1?
Yes
No
SCL
stretched

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