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STMicroelectronics STM32F05 series User Manual

STMicroelectronics STM32F05 series
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RM0091 Universal synchronous asynchronous receiver transmitter (USART)
Doc ID 018940 Rev 1 579/742
Figure 231. TC/TXE behavior when transmitting
Break characters
Setting the SBKRQ bit transmits a break character. The break frame length depends on the
M bit (see Figure 229).
If a ‘1’ is written to the SBKRQ bit, a break character is sent on the TX line after completing
the current character transmission. The SBKF bit is set by the write operation and it is reset
by hardware when the break character is completed (during the stop bits after the break
character). The USART inserts a logic 1 signal (STOP) for the duration of 2 bits at the end of
the break frame to guarantee the recognition of the start bit of the next frame.
Idle characters
Setting the TE bit drives the USART to send an idle frame before the first data frame.
25.5.3 Receiver
The USART can receive data words of either 8 or 9 bits depending on the M bit in the
USART_CR1 register.
Start bit detection
The start bit detection sequence is the same when oversampling by 16 or by 8.
In the USART, the start bit is detected when a specific sequence of samples is recognized.
This sequence is: 1 1 1 0 X 0 X 0X 0X 0 X 0X 0.
TX line
USART_DR
Frame 1
TXE flag
F2
TC flag
F3
Frame 2
software waits until TXE=1
and writes F2 into DR
software waits until TXE=1
and writes F3 into DR
TC is not set
because TXE=0
software waits until TC=1
Frame 3
TC is set because
TXE=1
set by hardware
cleared by software
set by hardware
cleared by software
set by hardware
set
Idle preamble
by hardware
F1
software
enables the
USART
TC is not set
because TXE=0
software waits until TXE=1
and writes F1 into DR
ai17121b

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STMicroelectronics STM32F05 series Specifications

General IconGeneral
BrandSTMicroelectronics
ModelSTM32F05 series
CategoryMicrocontrollers
LanguageEnglish

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