RM0091 Serial peripheral interface / inter-IC sound (SPI/I2S)
Doc ID 018940 Rev 1 677/742
26.7.6 SPI Rx CRC register (SPIx_RXCRCR)
Address offset: 0x14
Reset value: 0x0000
26.7.7 SPI Tx CRC register (SPIx_TXCRCR)
Address offset: 0x18
Reset value: 0x0000
1514131211109876543210
RxCRC[15:0]
rrrrrrrrrrrrrrrr
Bits 15:0 RXCRC[15:0]: Rx CRC register
When CRC calculation is enabled, the RxCRC[15:0] bits contain the computed CRC value of
the subsequently received bytes. This register is reset when the CRCEN bit in SPIx_CR1
register is written to 1. The CRC is calculated serially using the polynomial programmed in
the SPIx_CRCPR register.
Only the 8 LSB bits are considered when the data frame format is set to be 8-bit data (CRCL
bit in the SPIx_CR1 is cleared). CRC calculation is done based on any CRC8 standard.
The entire 16-bits of this register are considered when a 16-bit data frame format is selected
(CRCL bit in the SPIx_CR1 register is set). CRC calculation is done based on any CRC16
standard.
Note: A read to this register when the BSY Flag is set could return an incorrect value.
Not used for the I
2
S mode.
1514131211109876543210
TxCRC[15:0]
rrrrrrrrrrrrrrrr
Bits 15:0 TxCRC[15:0]: Tx CRC register
When CRC calculation is enabled, the TxCRC[7:0] bits contain the computed CRC value of
the subsequently transmitted bytes. This register is reset when the CRCEN bit of SPIx_CR1
is written to 1. The CRC is calculated serially using the polynomial programmed in the
SPIx_CRCPR register.
Only the 8 LSB bits are considered when the data frame format is set to be 8-bit data (CRCL
bit in the SPIx_CR1 is cleared). CRC calculation is done based on any CRC8 standard.
The entire 16-bits of this register are considered when a 16-bit data frame format is selected
(CRCL bit in the SPIx_CR1 register is set). CRC calculation is done based on any CRC16
standard.
Note: A read to this register when the BSY flag is set could return an incorrect value.
Note: Not used for the I
2
S mode.
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