STMicroelectronics STM32F05 series - TIM16 and TIM17 Counter (TIM16_CNT and TIM17_CNT); TIM16 and TIM17 Prescaler (TIM16_PSC and TIM17_PSC); TIM16 and TIM17 Auto-Reload Register (TIM16_ARR and TIM17_ARR)

General-purpose timers (TIM15/16/17) RM0091
432/742 Doc ID 018940 Rev 1
18.6.8 TIM16 and TIM17 counter (TIM16_CNT and TIM17_CNT)
Address offset: 0x24
Reset value: 0x0000
18.6.9 TIM16 and TIM17 prescaler (TIM16_PSC and TIM17_PSC)
Address offset: 0x28
Reset value: 0x0000
18.6.10 TIM16 and TIM17 auto-reload register (TIM16_ARR and TIM17_ARR)
Address offset: 0x2C
Reset value: 0x0000
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CNT[15:0]
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Bits 15:0 CNT[15:0]: Counter value
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PSC[15:0]
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Bits 15:0 PSC[15:0]: Prescaler value
The counter clock frequency (CK_CNT) is equal to f
CK_PSC
/ (PSC[15:0] + 1).
PSC contains the value to be loaded in the active prescaler register at each update event
(including when the counter is cleared through UG bit of TIMx_EGR register or through trigger
controller when configured in “reset mode”).
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ARR[15:0]
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Bits 15:0 ARR[15:0]: Auto-reload value
ARR is the value to be loaded in the actual auto-reload register.
Refer to the Section 17.3.1: Time-base unit on page 354 for more details about ARR update
and behavior.
The counter is blocked while the auto-reload value is null.