Embedded Flash memory RM0091
58/742 Doc ID 018940 Rev 1
3.5.8 Write protection register (FLASH_WRPR)
Address offset: 0x20
Reset value: 0xFFFF FFFF
3.6 Flash register map
Refer to Section 2.2.2 on page 37 for the register boundary addresses.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
WRP[15:0]
Bits 31:0 WRP: Write protect
This register contains the write-protection option bytes loaded by the OBL.
Table 8. Flash interface - register map and reset values
Offset Register
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0x000
FLASH_ACR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
PRFTBS
PRFTBE
HLFCYA
LATENCY
[2:0]
Reset value 000000
0x004
FLASH_KEYR FKEYR[31:0]
Reset value xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
0x008
FLASH_OPTKEYR OPTKEYR[31:0]
Reset Value xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx
0x00C
FLASH_SR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
EOP
WRPRTERR
Res.
PGERR
ERLYBSY
BSY
Reset value 00 000
0x010
FLASH_CR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
OBL_LAUNCH
EOPIE
Res.
ERRIE
OPTWRE
Res.
LOCK
STRT
OPTER
OPTPG
Res.
MER
PER
PG
Reset value 00 00 1000 000
0x014
FLASH_AR FAR[31:0]
Reset value 00000000000000000000000000000000
0x01C
FLASH_OBR
Data1
Data0
Res.
RAM_PARITY_CHECK
VDDA_MONITOR
nBOOT1
Res.
nRST_STDBY
nRST_STOP
WDG_SW
Res.
Res.
Res.
Res.
Res.
RDPRT2
RDPRT1
OPTERR
Reset value 11111111111111111111111100
0x020
FLASH_WRPR
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
Res.
WRP[15:0]
Reset value 11111111111111111111111111111111
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