STMicroelectronics STM32F05 series - USART Extended Features

Universal synchronous asynchronous receiver transmitter (USART) RM0091
572/742 Doc ID 018940 Rev 1
● Parity control:
– Transmits parity bit
– Checks parity of received data byte
● Four error detection flags:
– Overrun error
– Noise detection
–Frame error
– Parity error
● Fourteen interrupt sources with flags
– CTS changes
– LIN break detection
– Transmit data register empty
– Transmission complete
– Receive data register full
– Idle line received
– Overrun error
– Framing error
– Noise error
– Parity error
– Address/character match
– Receiver timeout interrupt
– End of block interrupt
– Wakeup from Stop mode
● Multiprocessor communication - enter mute mode if address match does not occur
● Wakeup from mute mode (by idle line detection or address mark detection)
● Two receiver wakeup modes: Address bit (MSB, 9
th
bit), Idle line
25.3 USART extended features
● LIN master synchronous break send capability and LIN slave break detection capability
– 13-bit break generation and 10/11 bit break detection when USART is hardware
configured for LIN
● IrDA SIR encoder decoder
– Support for 3/16 bit duration for normal mode
● Smartcard mode
– Supports the T=0 and T=1 asynchronous protocols for Smartcards as defined in
the ISO/IEC 7816-3 standard
– 1.5 stop bits for Smartcard operation
● Support for ModBus communication
– Timeout feature
– CR/LF character recognition