Basic timer (TIM6) RM0091
446/742 Doc ID 018940 Rev 1
19.3.3 Clock source
The counter clock is provided by the Internal clock (CK_INT) source.
The CEN (in the TIMx_CR1 register) and UG bits (in the TIMx_EGR register) are actual
control bits and can be changed only by software (except for UG that remains cleared
automatically). As soon as the CEN bit is written to 1, the prescaler is clocked by the internal
clock CK_INT.
Figure 190 shows the behavior of the control circuit and the upcounter in normal mode,
without prescaler.
Figure 190. Control circuit in normal mode, internal clock divided by 1
19.3.4 Debug mode
When the microcontroller enters the debug mode (Cortex™-M0 core - halted), the TIMx
counter either continues to work normally or stops, depending on the DBG_TIMx_STOP
configuration bit in the DBG module. .
CK_INT
00
Counter clock = CK_CNT = CK_PSC
Counter register
01 02 03 04 05 06 0732 33 34 35 3631
CEN=CNT_EN
UG
CNT_INIT
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