Real-time clock (RTC) RM0091
546/742 Doc ID 018940 Rev 1
24.3.12 Time-stamp function
Time-stamp is enabled by setting the TSE bit of RTC_CR register to 1.
The calendar is saved in the time-stamp registers (RTC_TSSSR, RTC_TSTR, RTC_TSDR)
when a time-stamp event is detected on the RTC_TS pin. When a time-stamp event occurs,
the time-stamp flag bit (TSF) in RTC_ISR register is set.
By setting the TSIE bit in the RTC_CR register, an interrupt is generated when a time-stamp
event occurs.
If a new time-stamp event is detected while the time-stamp flag (TSF) is already set, the
time-stamp overflow flag (TSOVF) flag is set and the time-stamp registers (RTC_TSTR and
RTC_TSDR) maintain the results of the previous event.
Note: TSF is set 2 ck_apre cycles after the time-stamp event occurs due to synchronization
process.
There is no delay in the setting of TSOVF. This means that if two time-stamp events are
close together, TSOVF can be seen as '1' while TSF is still '0'. As a consequence, it is
recommended to poll TSOVF only after TSF has been set.
Caution: If a time-stamp event occurs immediately after the TSF bit is supposed to be cleared, then
both TSF and TSOVF bits are set.To avoid masking a time-stamp event occurring at the
same moment, the application must not write ‘0’ into TSF bit unless it has already read it to
‘1’.
Optionally, a tamper event can cause a time-stamp to be recorded. See the description of
the TAMPTS control bit in Section 24.6.12: RTC time-stamp sub second register
(RTC_TSSSR).
24.3.13 Tamper detection
The RTC_TAMPx input events can be configured either for edge detection, or for level
detection with filtering.
RTC backup registers
The backup registers (RTC_BKPxR) are implemented in the V
DD
backup domain that
remains powered-on by V
BAT
when the V
DD
power is switched off. They are not reset by
system reset, or when the device wakes up from Standby mode. They are reset by a power-
on reset.
The backup registers are reset when a tamper detection event occurs (see Section 24.6.16:
RTC backup registers (RTC_BKPxR) and Tamper detection initialization on page 546.
Tamper detection initialization
Each RTC_TAMPx tamper detection input is associated with a flag TAMPxF in the
RTC_ISR2 register. Each input can be enabled by setting the corresponding TAMPxE bits
to 1 in the RTC_TAFCR register.
A tamper detection event resets all backup registers (RTC_BKPxR).
By setting the TAMPIE bit in the RTC_TAFCR register, an interrupt is generated when a
tamper detection event occurs.
To Next Page
Loading...
Need help?
General
