STMicroelectronics STM32F05 series - Figure 54. Counter Timing Diagram, Internal Clock Divided by 4; Figure 55. Counter Timing Diagram, Internal Clock Divided by N; Figure 56. Counter Timing Diagram, Update Event When Repetition Counter

RM0091 Advanced-control timers (TIM1)
Doc ID 018940 Rev 1 231/742
Figure 54. Counter timing diagram, internal clock divided by 4
Figure 55. Counter timing diagram, internal clock divided by N
Figure 56. Counter timing diagram, update event when repetition counter
is not used
CK_PSC
0036 0035
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0001
0000
Counter underflow
Update event (UEV)
Timer clock = CK_CNT
Counter register
36
20
1F
Update interrupt flag (UIF)
Counter underflow
Update event (UEV)
CK_PSC
00
CK_PSC
36
CEN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter underflow
Update event (UEV)
35 34 33 32 31 30 2F04 03 02 01 0005
Auto-reload register
FF 36
Write a new value in TIMx_ARR