EasyManua.ls Logo

STMicroelectronics STM32F05 series - Table 103. Error Handling Timing Parameters

STMicroelectronics STM32F05 series
742 pages
To Next Page IconTo Next Page
To Next Page IconTo Next Page
To Previous Page IconTo Previous Page
To Previous Page IconTo Previous Page
Loading...
HDMI-CEC controller (HDMI-CEC) RM0091
706/742 Doc ID 018940 Rev 1
Table 103. Error handling timing parameters
Time RXTOL ms Description
T
s
x 0 Bit start event.
T
1
10.3
The earliest time for a low - high transition when
indicating a logical 1.
00.4
T
n1
x0.6
The nominal time for a low - high transition when
indicating a logical 1.
T
2
00.8
The latest time for a low - high transition when
indicating a logical 1.
10.9
T
ns
x 1.05 Nominal sampling time.
T
3
11.2
The earliest time a device is permitted return to a
high impedance state (logical 0).
01.3
T
n0
x1.5
The nominal time a device is permitted return to a
high impedance state (logical 0).
T
4
01.7
The latest time a device is permitted return to a high
impedance state (logical 0).
11.8
T
5
11.85
The earliest time for the start of a following bit.
02.05
T
nf
x 2.4 The nominal data bit period.
T
6
02.75
The latest time for the start of a following bit.
12.95

Table of Contents

Related product manuals