STMicroelectronics STM32F05 series - Figure 47. Counter Timing Diagram, Internal Clock Divided by 2; Figure 48. Counter Timing Diagram, Internal Clock Divided by 4; Figure 49. Counter Timing Diagram, Internal Clock Divided by N

Advanced-control timers (TIM1) RM0091
228/742 Doc ID 018940 Rev 1
Figure 47. Counter timing diagram, internal clock divided by 2
Figure 48. Counter timing diagram, internal clock divided by 4
Figure 49. Counter timing diagram, internal clock divided by N
CK_PSC
0035 0000 0001 0002 0003
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0034
0036
Counter overflow
Update event (UEV)
CK_PSC
0000 0001
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0035
0036
Counter overflow
Update event (UEV)
Timer clock = CK_CNT
Counter register
00
1F
20
Update interrupt flag (UIF)
Counter overflow
Update event (UEV)
CK_PSC