Embedded Flash memory RM0091
56/742 Doc ID 018940 Rev 1
3.5.6 Flash address register (FLASH_AR)
Address offset: 0x14
Reset value: 0x0000 0000
This register is updated by hardware with the currently/last used address. For Page Erase
operations, this should be updated by software to indicate the chosen page.
Bit 2 MER: Mass erase
Erase of all user pages chosen.
Bit 1 PER: Page erase
Page Erase chosen.
Bit 0 PG: Programming
Flash programming chosen.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16
FAR[31:16]
wwwwwww w wwwwwww w
1514131211109 8765432 1 0
FAR[15:0]
wwwwwww w wwwwwww w
Bits 31:0 FAR: Flash Address
Chooses the address to program when programming is selected, or a page to
erase when Page Erase is selected.
Note: Write access to this register is blocked when the BSY bit in the FLASH_SR
register is set.
To Next Page
Loading...
Need help?
General
