STMicroelectronics STM32F05 series - Figure 100. Counter Timing Diagram, Internal Clock Divided by 1; Figure 101. Counter Timing Diagram, Internal Clock Divided by 2; Figure 102. Counter Timing Diagram, Internal Clock Divided by 4

RM0091 General-purpose timers (TIM2 and TIM3)
Doc ID 018940 Rev 1 299/742
Figure 100. Counter timing diagram, internal clock divided by 1
Figure 101. Counter timing diagram, internal clock divided by 2
Figure 102. Counter timing diagram, internal clock divided by 4
CK_INT
36
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter underflow (cnt_udf)
Update event (UEV)
35 34 33 32 31 30 2F04 03 02 01 0005
CK_INT
0001 0036 0035 0034 0033
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0002
0000
Counter underflow
Update event (UEV)
0036 0035
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0001
0000
Counter underflow
Update event (UEV)
CK_INT