STMicroelectronics STM32F05 series - Figure 94. Counter Timing Diagram, Internal Clock Divided by 1; Figure 95. Counter Timing Diagram, Internal Clock Divided by 2; Figure 96. Counter Timing Diagram, Internal Clock Divided by 4

General-purpose timers (TIM2 and TIM3) RM0091
296/742 Doc ID 018940 Rev 1
Figure 94. Counter timing diagram, internal clock divided by 1
Figure 95. Counter timing diagram, internal clock divided by 2
Figure 96. Counter timing diagram, internal clock divided by 4
CK_INT
00
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
Counter overflow
Update event (UEV)
01 02 03 04 05 06 0732 33 34 35 3631
CK_INT
0035 0000 0001 0002 0003
CNT_EN
Timer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0034
0036
Counter overflow
Update event (UEV)
0000 0001
CNT_EN
TImer clock = CK_CNT
Counter register
Update interrupt flag (UIF)
0035
0036
Counter overflow
Update event (UEV)
CK_INT