Inter-integrated circuit (I
2
C) interface RM0091
490/742 Doc ID 018940 Rev 1
Figure 210. Master initialization flowchart
Initialization of a master receiver addressing a 10-bit address slave
● If the slave address is in 10-bit format, you can choose to send the complete read
sequence by clearing the HEAD10R bit in the I2Cx_CR2 register. In this case the
master automatically sends the following complete sequence after the START bit is set:
(Re)Start + Slave address 10-bit header Write + Slave address 2nd byte + REStart +
Slave address 10-bit header Read
Figure 211. 10-bit address read access with HEAD10R=0
● If the master addresses a 10-bit address slave, transmits data to this slave and then
reads data from the same slave, a master transmission flow must be done first. Then a
repeated start is set with the 10 bit slave address configured with HEAD10R=1. In this
case the master sends this sequence: ReStart + Slave address 10-bit header Read
MS19859V1
Initial settings
Master
initialization
Enable interrupts and/or DMA in I2Cx_CR1
End
MS19822V1
DATA A PADATA
Slave address
2nd byte
Slave address
1st 7 bits
SrA2A1 R/WR/W
Slave address
1st 7 bits
S A3
1 1 1 1 0 X X
1
1 1 1 1 0 X X
0
Write
Read
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