STMicroelectronics STM32F05 series User Manual

Inter-integrated circuit (I
2
C) interface RM0091
468/742 Doc ID 018940 Rev 1
23 Inter-integrated circuit (I
2
C) interface
23.1 I
2
C introduction
The I
2
C (inter-integrated circuit) bus interface handles communications between the
microcontroller and the serial I
2
C bus. It provides multimaster capability, and controls all I
2
C
bus-specific sequencing, protocol, arbitration and timing. It supports standard speed mode,
Fast Mode and Fast Mode Plus.
It is also SMBus (system management bus) and PMBus (power management bus)
compatible.
DMA can be used to reduce CPU overload.
23.2 I
2
C main features
● I
2
C bus specification rev03 compatibility:
– Slave and master modes
– Multimaster capability
– Standard mode (up to 100 kHz)
– Fast Mode (up to 400 kHz)
– Fast Mode Plus (up to 1 MHz)
– 7-bit and 10-bit addressing mode
– Multiple 7-bit slave addresses (2 addresses, 1 with configurable mask)
– All 7-bit addresses acknowledge mode
– General call
– Programmable setup and hold times
– Easy to use event management
– Optional clock stretching
– Software reset
● 1-byte buffer with DMA capability
● Programmable analog and digital noise filters
The following additional features are also available depending on the product
implementation (see Section 23.3: I2C implementation):
● SMBus specification rev 2.0 compatibility:
– Hardware PEC (Packet Error Checking) generation and verification with ACK
control
– Command and data acknowledge control
– Address resolution protocol (ARP) support
– Host and Device support
– SMBus alert
– Timeouts and idle condition detection

STMicroelectronics STM32F05 series Specifications

General

Brand	STMicroelectronics
Model	STM32F05 series
Category	Microcontrollers
Language	English