RM0091 Analog-to-digital converter (ADC)
Doc ID 018940 Rev 1 169/742
12.2 ADC main features
● High performance
– 12-bit, 10-bit, 8-bit or 6-bit configurable resolution
– ADC conversion time: 1.0 µs for 12-bit resolution (1 MHz), 0.93 µs conversion time
for 10 bit resolution, faster conversion times can be obtained by lowering
resolution.
– Self-calibration
– Programmable sampling time
– Data alignment with in-built data coherency
– DMA support
● Low power
– Application can reduce PLCK frequency for low power operation while still keeping
optimum ADC performance. For example, 1.0 µs conversion time is kept, whatever
the frequency of PCLK)
– Wait mode: prevents ADC overrun in applications with low frequency PLCK
– Auto off mode: ADC is automatically powered off except during the active
conversion phase. This dramatically reduces the power consumption of the ADC.
● Analog input channels
– 16 external analog inputs
– 1 channel for internal temperature sensor (V
SENSE
)
– 1 channel for internal reference voltage (V
REFINT
)
– 1 channel for monitoring external V
BAT
power supply pin.
● Start-of-conversion can be initiated:
– By software
– By hardware triggers with configurable polarity (internal timer events from TIM1,
TIM2, TIM3 and TIM15)
● Conversion modes
– Can convert a single channel or can scan a sequence of channels.
– Single mode converts selected inputs once per trigger
– Continuous mode converts selected inputs continuously
– Discontinuous mode
● Interrupt generation at the end of sampling, end of conversion, end of sequence
conversion, and in case of analog watchdog or overrun events
● Analog watchdog
● ADC supply requirements: 2.4 V to 3.6 V
● ADC input range: V
SSA
≤ V
IN
≤ V
DDA
Figure 22 shows the block diagram of the ADC.
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