STMicroelectronics STM32F05 series - Figure 152. TIM15 Block Diagram

RM0091 General-purpose timers (TIM15/16/17)
Doc ID 018940 Rev 1 377/742
Figure 152. TIM15 block diagram
Prescaler
Auto-reload register
counter
Capture/Compare 1 register
Capture/Compare 2 register
U
U
U
CC1I
CC2I
Trigger
controller
+/-
Stop, clear
or
up/down
TI1FP1
TI2FP2
ITR0
ITR1
ITR2
TRGI
controller
output
control
DTG
DTG registers
TRGO
OC1REF
OC2REF
REP register
U
Repetition
counter
UI
Reset, enable, up, count
CK_PSC
IC1
IC2
Prescaler
Prescaler
Input filter &
Edge detector
IC2PS
IC1PS
TI1FP1
output
control
Reg
event
Notes:
Preload registers transferred
to active registers on
U
event
according to control bit
interrupt & DMA output
TGI
TRC
TRC
ITR
TRC
TI1F_ED
Input filter &
Edge detector
CC1I
CC2I
TI1FP2
TI2FP1
TI2FP2
BI
TI1
TI2
TIMx_CH1
TIMx_CH2
BRK
TIMx_BKIN
OC1
OC2
TIMx_CH1
TIMx_CH2
TIMx_CH1N
OC1N
to other timers
mode
Slave
PSC
CNT
Internal clock (CK_INT)
CK_CNT
Clock failure event from clock controller
Polarity selection
CSS (clock security system
CK_TIM1121314151617 from RCC
ITR3
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