RM0091 Advanced-control timers (TIM1)
Doc ID 018940 Rev 1 251/742
Note: The break inputs is acting on level. Thus, the MOE cannot be set while the break input is
active (neither automatically nor by software). In the meantime, the status flag BIF cannot be
cleared.
The break can be generated by the BRK input which has a programmable polarity and an
enable bit BKE in the TIMx_BDTR Register.
In addition to the break input and the output management, a write protection has been
implemented inside the break circuit to safeguard the application. It allows you to freeze the
configuration of several parameters (dead-time duration, OCx/OCxN polarities and state
when disabled, OCxM configurations, break enable and polarity). You can choose from 3
levels of protection selected by the LOCK bits in the TIMx_BDTR register. Refer to
Section 15.4.18: TIM1 break and dead-time register (TIM1_BDTR) on page 286. The LOCK
bits can be written only once after an MCU reset.
The Figure 80 shows an example of behavior of the outputs in response to a break.
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