To Next Page

To Previous Page

RM0091 General-purpose timers (TIM2 and TIM3)

Doc ID 018940 Rev 1 309/742

detected (sampled at f

DTS

frequency). Then write IC1F bits to 0011 in the

TIMx_CCMR1 register.

● Select the edge of the active transition on the TI1 channel by writing the CC1P and

CC1NP bits to 0 in the TIMx_CCER register (rising edge in this case).

● Program the input prescaler. In our example, we wish the capture to be performed at

each valid transition, so the prescaler is disabled (write IC1PS bits to 00 in the

TIMx_CCMR1 register).

● Enable capture from the counter into the capture register by setting the CC1E bit in the

TIMx_CCER register.

● If needed, enable the related interrupt request by setting the CC1IE bit in the

TIMx_DIER register, and/or the DMA request by setting the CC1DE bit in the

TIMx_DIER register.

When an input capture occurs:

● The TIMx_CCR1 register gets the value of the counter on the active transition.

● CC1IF flag is set (interrupt flag). CC1OF is also set if at least two consecutive captures

occurred whereas the flag was not cleared.

● An interrupt is generated depending on the CC1IE bit.

● A DMA request is generated depending on the CC1DE bit.

In order to handle the overcapture, it is recommended to read the data before the

overcapture flag. This is to avoid missing an overcapture which could happen after reading

the flag and before reading the data.

Note: IC interrupt and/or DMA requests can be generated by software by setting the

corresponding CCxG bit in the TIMx_EGR register.

STMicroelectronics STM32F05 series User Manual

Questions and Answers: