Freescale Semiconductor MPC5553 - Page 216

System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 6-37
6.3.1.12.17 MPC5553: Pad Configuration Register 55 (SIU_PCR55)
The SIU_PCR55 register controls the pin function, direction, and static electrical attributes of the
DATA[27]_FEC_TXD[2]_CAL_DATA[11]_GPIO[55] pin.
Figure 6-30. MPC5553: DATA[27]_FEC_TXD[2]_CAL_DATA[11]_GPIO[55]
Pad Configuration Register (SIU_PCR55)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x00AE Access: Read / write[3:11, 14:15]
0123456789101112131415
R 000
PA
1
1
CAL_DATA[11] is for calibration only.
OBE
2
2
When configured as DATA[27], FEC_TXD[2], or CAL_DATA[11], the OBE bit has no effect. When configured as GPO, set the
OBE bit to 1.
IBE
3
3
When configured as DATA[27], FEC_TXD[2], CAL_DATA[11], or GPO, set the IBE bit to 1 to reflect the pin state in the
corresponding GPDI register. Clear the IBE to 0 to reduce power consumption. When configured as GPI, set the IBE bit to 1.
DSC ODE
4
4
When configured as DATA[27] or CAL_DATA[11], clear the ODE bit to 0.
HYS
5
5
If external master operation is enabled, clear the HYS bit to 0.
00
WPE
6
6
Refer to the EBI section for weak pullup settings when configured as DATA[27] or CAL_DATA[11].
WPS
6
W
RESET: 000000001100001 1
Table 6-29. PCR55 PA Field Definition
PA Field Pin Function
0b000 GPIO[55]
0b001 DATA[27]
0b010 FEC_TXD[2]
0b011 Reserved
0b100 CAL_DATA[11]
1
1
For calibration only.