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STMicroelectronics STM32WL5 Series - Page 43

STMicroelectronics STM32WL5 Series
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RM0453 Rev 5 43/1450
RM0453 Contents
44
38.12.3 DBGMCU CPU1 APB1 peripheral freeze register 1
(DBGMCU_APB1FZR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1409
38.12.4 DBGMCU CPU2 APB1 peripheral freeze register 1
(DBGMCU_C2APB1FZR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1410
38.12.5 DBGMCU CPU1 APB1 peripheral freeze register 2
(DBGMCU_APB1FZR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1411
38.12.6 DBGMCU CPU2 APB1 peripheral freeze register 2
(DBGMCU_C2APB1FZR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1411
38.12.7 DBGMCU CPU1 APB2 peripheral freeze register
(DBGMCU_APB2FZR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1412
38.12.8 DBGMCU CPU2 APB2 peripheral freeze register
(DBGMCU_C2APB2FZR) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1413
38.12.9 DBGMCU register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1413
38.13 CPU2 ROM tables . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1415
38.13.1 CPU2 ROM1 memory type register (C2ROM1_MEMTYPER) . . . . . 1416
38.13.2 CPU2 ROM1 CoreSight peripheral identity register 4
(C2ROM1_PIDR4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1417
38.13.3 CPU2 ROM1 CoreSight peripheral identity register 0
(C2ROM1_PIDR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1417
38.13.4 CPU2 ROM1 CoreSight peripheral identity register 1
(C2ROM1_PIDR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1418
38.13.5 CPU2 ROM1 CoreSight peripheral identity register 2
(C2ROM1_PIDR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1418
38.13.6 CPU2 ROM1 CoreSight peripheral identity register 3
(C2ROM1_PIDR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1419
38.13.7 CPU2 ROM1 CoreSight component identity register 0
(C2ROM1_CIDR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1419
38.13.8 CPU2 ROM1 CoreSight peripheral identity register 1
(C2ROM1_CIDR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1420
38.13.9 CPU2 ROM1 CoreSight component identity register 2
(C2ROM1_CIDR2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1420
38.13.10 CPU2 ROM1 CoreSight component identity register 3
(C2ROM1_CIDR3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1421
38.13.11 CPU2 ROM1 register map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1421
38.13.12 CPU2 ROM2 memory type register (C2ROM2_MEMTYPER) . . . . . 1422
38.13.13 CPU2 ROM2 CoreSight peripheral identity register 4
(C2ROM2_PIDR4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1422
38.13.14 CPU2 ROM2 CoreSight peripheral identity register 0
(C2ROM2_PIDR0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1423
38.13.15 CPU2 ROM2 CoreSight peripheral identity register 1
(C2ROM2_PIDR1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1423

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