Freescale Semiconductor MPC5553 - Page 270

System Interface Unit (SIU)
MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 6-91
6.3.1.12.113 Pad Configuration Register 227 (SIU_PCR227)
The SIU_PCR227 register controls the drive strength of the EVTO pin.
Figure 6-125. EVTO Pad Configuration Register (SIU_PCR227)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.114 Pad Configuration Register 228 (SIU_PCR228)
The SIU_PCR228 register controls the drive strength of the TDO pin.
Figure 6-126. TDO Pad Configuration Register (SIU_PCR228)
Refer to Table 6-16 for bit field definitions.
6.3.1.12.115 Pad Configuration Register 229 (SIU_PCR229)
The SIU_PCR229 register controls the enabling/disabling and drive strength of the CLKOUT pin. The
CLKOUT pin is enabled and disabled by setting and clearing the OBE bit. The CLKOUT pin is enabled
during reset.
Figure 6-127. CLKOUT Pad Configuration Register (SIU_PCR229)
Refer to Table 6-16 for bit field definitions.
Address: Base + 0x0206 Access: Read / write[8:9]
0123456789101112131415
R 00000000
DSC
000000
W
RESET: 0000000011000000
Address: Base + 0x0208 Access: Read / write[8:9]
0123456789101112131415
R 00000000
DSC
000000
W
RESET: 0000000011000000
Address: Base + 0x020A Access: Read / write[6, 8:9]
0123456789101112131415
R 000000
OBE
0
DSC
000000
W
RESET: 0000001011000000