MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
12-28 Freescale Semiconductor
Figure 12-9. Basic Flow Diagram of a Single Beat Read Cycle
Figure 12-10. Single Beat 32-bit Read Cycle, CS
Access, Zero Wait States
Ye s
No
Receives Address
Asserts Transfer Start (TS)
Drives Address and Attributes
Master (EBI)
Drives Data
Asserts Transfer
Acknowledge (TA)
Asserts Transfer
Acknowledge (TA)
Receives Data
Slave
CS Access
?
DATA is valid
CLKOUT
ADDR[8:31]
TS
DATA[0:31]
TA
RD_WR
TSIZ[0:1]
BDIP
OE
CSx
00