MPC5553/MPC5554 Microcontroller Reference Manual, Rev. 5
Freescale Semiconductor 13-27
The program operation consists of the following sequence of events:
1. Change the value in the FLASH_MCR[PGM] bit from a 0 to a 1.
NOTE
Ensure the block that contains the address to be programmed is unlocked.
See Section 13.3.2.2, “Low-/Mid-Address Space Block Locking Register
(FLASH_LMLR), Section 13.3.2.3, “High-Address Space Block Locking
Register (FLASH_HLR)” and Section 13.3.2.4, “Secondary
Low-/Mid-Address Space Block Locking Register (FLASH_SLMLR)” for
more information.
2. Write the first address to be programmed in the flash module with the program data. This write is
referred to as a program data interlock write. An interlock write may be either be an aligned word
or doubleword.
3. If more than one word or doubleword is to be programmed, write each additional address in the
page with data to be programmed. This is referred to as a program data write. All unwritten data
words default to 0xFFFF FFFF.
4. Write a logic 1 to the FLASH_MCR[EHV] bit to start the internal program sequence or skip to
step 9 to terminate.
5. Wait until the FLASH_MCR[DONE] bit goes high.
6. Confirm FLASH_MCR[PEG] = 1.
7. Write a logic 0 to the FLASH_MCR[EHV] bit.
8. If more addresses are to be programmed, return to step 2.
9. Write a logic 0 to the FLASH_MCR[PGM] bit to terminate the program sequence.
The program sequence is presented graphically in Figure 13-14. The program suspend operation detailed
in Figure 13-14 is discussed in Section 13.4.2.3.2, “Flash Program Suspend/Resume.”
The first write after a program is initiated determines the page address to be programmed. Program may
be initiated with the 0 to 1 transition of the FLASH_MCR[PGM] bit or by clearing the
FLASH_MCR[EHV] bit at the end of a previous program. This first write is referred to as an interlock
write. If the program is not an erase-suspended program, the interlock write determines if the shadow or
normal array space will be programmed and causes FLASH_MCR[PEAS] to be set/cleared.
In the case of an erase-suspended program, the value in FLASH_MCR[PEAS], is retained from the erase.
An interlock write must be performed before setting FLASH_MCR[EHV]. The user may terminate a
program sequence by clearing FLASH_MCR[PGM] prior to setting FLASH_MCR[EHV].
If multiple writes are done to the same location the data for the last write is used in programming.
While FLASH_MCR[DONE] is low, FLASH_MCR[EHV] is high and FLASH_MCR[PSUS] is low the
user may clear FLASH_MCR[EHV], resulting in a program abort. A program abort forces the module to
step 8 of the program sequence. An aborted program will result in FLASH_MCR[PEG] being set low,
indicating a failed operation. The data space being operated on before the abort will contain indeterminate
data. The user may not abort a program sequence while in program suspend.
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