GD32F3x0 User Manual
232
Edge detection mode on tamper input detection
When FLT bit is set to 0x0, the tamper detection is set to edge detection mode and TPxEG
bit determines the rising edge or falling edge is the detecting edge. When tamper detection is
under edge detection mode, the internal pull-up resistors on the tamper detection input pin
are deactivated.
Because of detecting the tamper event will reset the backup registers (RTC_BKPx), writing
to the backup register should ensure that the tamper event reset and the writing operation
will not occur at the same time, a recommend way to avoid this situation is disable the
tamper detection before writing to the backup register and re-enable tamper detection after
finish writing.
Note: Tamper detection is still running when V
DD
power is switched off if tamper is enabled.
Level detection mode with configurable filtering on tamper input detection
When FLT bit is not reset to 0x0, the tamper detection is set to level detection mode and FLT
bit determines the consecutive number of samples (2, 4 or 8) needed for valid level. When
DISPU is set to 0x0 (this is default), the internal pull-up resistance will pre-charge the tamper
input pin before each sampling and thus larger capacitance is allowed to connect to the
tamper input pin. The pre-charge duration is configured through PRCH bit. Higher
capacitance needs long pre-charge time.
The time interval between each sampling is also configurable. Through adjusting the
sampling frequency (FREQ), software can balance between the power consuming and
tamper detection latency.
15.3.13. Calibration clock output
Calibration clock can be output on the RTC_OUT if COEN bit is set to 1.
When the COS bit is set to 0 (this is default) and asynchronous prescaler is set to 0x7F
(FACTOR_A), the frequency of RTC_CALIB is f
rtcclk
64
⁄
. When the RTCCLK is 32.768KHz,
RTC_CALIB output is corresponding to 512Hz. It’s recommend to using rising edge of
RTC_CALIB output because there may be a light jitter on falling edge.
When the COS bit is set to 1, the RTC_CALIB frequency is:
f
rtc_calib
=
f
rtcclk
(
FACTOR_A+1
)
×(FACTOR_S+1)
(15-5)
When the RTCCLK is 32.768 KHz, RTC_CALIB output is corresponding to 1Hz if prescaler
are default values.
15.3.14. Alarm output
When OS control bits are not reset, RTC_ALARM alternate function output is enabled. This
function will directly output the content of alarm flag in RTC_STAT.
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