GigaDevice Semiconductor GD32F3x0 - Port Output Speed Register 1 (Gpiox_Ospd1, X=A

GD32F3x0 User Manual
143
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
TG15
TG14
TG13
TG12
TG11
TG10
TG9
TG8
TG7
TG6
TG5
TG4
TG3
TG2
TG1
TG0
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
w
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
TGy
Port Toggle bit y(y=0..15)
These bits are set and cleared by software.
0: No action on the corresponding OCTLy bit
1: Toggle the corresponding OCTLy bit
7.4.13. Port output speed register 1 (GPIOx_OSPD1, x=A..D,F)
Address offset: 0x3C
Reset value: 0x0000 0000
This register has to be accessed by word(32-bit).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SPD15
SPD14
SPD13
SPD12
SPD11
SPD10
SPD9
SPD8
SPD7
SPD6
SPD5
SPD4
SPD3
SPD2
SPD1
SPD0
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
SPDy
Set Very High output speed when OSPDy(y=0..15) is 0b11
If the output speed is more than 50MHz, set this bit to 1 and set OSPDy to 0b11.
These bits are set and cleared by software.
0: No effect
1: Max speed more than 50MHz. Must set OSPDy to 0b11