GD32F3x0 User Manual
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11. Analog to digital converter (ADC)
11.1. Overview
A 12-bit successive approximation analog-to-digital converter module(ADC) is integrated on
the MCU chip, which can sample analog signals from 16 external channels, 2 internal
channels and the battery voltage (V
BAT
) channel. The 19 ADC sampling channels all support
a variety of operation modes. After sampling and conversion, the conversion results can be
stored in the corresponding data registers according to the least significant bit(LSB)
alignment or the most significant bit(MSB) alignment. An on-chip hardware oversample
scheme improves performances and reduces the computational burden of MCU
11.2. Characteristics
High performance:
– ADC sampling rsolution: 12-bit, 10-bit,8-bit, or 6-bit.
– Foreground calibration function.
– Programmable sampling time.
– Data storage mode: the most significant bit and the least significant bit.
– DMA support.
Dual clock domain architecture (APB clock and ADC clock).
Analog input channels:
– 16 external analog inputs.
– 1 channel for internal temperature sensor (V
SENSE
).
– 1 channel for internal reference voltage (V
REFINT
).
– 1 channel for monitoring external V
BAT
power supply pin.
Start of the conversion can be initiated:
– By software.
– By hardware triggers.
Operation modes:
– Convert a single channel or scan a sequence of channels.
– Single operation mode converts selected inputs once for per trigger.
– Continuous operation mode converts selected inputs continuously.
– Discontinuous operation mode.
Interrupt generation:
– At the end of routine conversions.
– Analog watchdog event.
Conversion result threshold monitor function: analog watchdog
Module supply requirements: 2.6V to 3.6V, and typical power supply voltage is 3.3V.
Oversampling:
– 16-bit data register.
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