GigaDevice Semiconductor GD32F3x0 - Port Output Speed Register 0 (Gpiox_Ospd0, X=A

GD32F3x0 User Manual
134
Refer to OM0 description
5
OM5
Pin 5 output mode bit
These bits are set and cleared by software.
Refer to OM0 description
4
OM4
Pin 4 output mode bit
These bits are set and cleared by software.
Refer to OM0 description
3
OM3
Pin 3 output mode bit
These bits are set and cleared by software.
Refer to OM0 description
2
OM2
Pin 2 output mode bit
These bits are set and cleared by software.
Refer to OM0 description
1
OM1
Pin 1 output mode bit
These bits are set and cleared by software.
Refer to OM0 description
0
OM0
Pin 0 output mode bit
These bits are set and cleared by software.
0: Output push-pull mode (reset value)
1: Output open-drain mode
7.4.3. Port output speed register 0 (GPIOx_OSPD0, x=A..D,F)
Address offset: 0x08
Reset value: 0x0C00 0000 for port A; 0x0000 0000 for others.
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
OSPD15[1:0]
OSPD14[1:0]
OSPD13[1:0]
OSPD12[1:0]
OSPD11[1:0]
OSPD10[1:0]
OSPD9[1:0]
OSPD8[1:0]
rw
rw
rw
rw
rw
rw
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OSPD7[1:0]
OSPD6[1:0]
OSPD5[1:0]
OSPD4[1:0]
OSPD3[1:0]
OSPD2[1:0]
OSPD1[1:0]
OSPD0[1:0]
rw
rw
rw
rw
rw
rw
rw
rw
Bits
Fields
Descriptions
31:30
OSPD15[1:0]
Pin 15 output max speed bits
These bits are set and cleared by software.
Refer to OSPD0[1:0] description
29:28
OSPD14[1:0]
Pin 14 output max speed bits
These bits are set and cleared by software.