GigaDevice Semiconductor GD32F3x0 - Figure 23-3. Connection with OTG Mode; Figure 23-4. State Transition Diagram of Host Port

GD32F3x0 User Manual
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Figure 23-3. Connection with OTG mode
VBUS
DM
DP
ID
DP
ID
DM
VBUS
5V Power
Supply
VDD
USB Micro
/Mini connector
GPIO
USBFS
GND
23.5.2. USB host function
USB Host Port State
Host application may control state of the USB port via USBFS_HPCS register. After system
initialization, the USB port stays at power-off state. After PP bit is set by software, the internal
USB PHY is powered on, and the USB port changes into disconnected state. After a
connection is detected, USB port changes into connected state. The USB port changes into
enabled state after a port reset is performed on USB bus.
Figure 23-4. State transition diagram of host port
Power-off
Dis-connected
Connected
Enabled
set PP bit
clear PP bit or VBUS is
not valid in OTG host mode
connection event
disconnection event
port reset
Clear PP bit
disconnection event
clear PE bit
clear PP bit