GigaDevice Semiconductor GD32F3x0 - Figure 16-22. Restart Mode; Figure 16-23. Pause Mode

GD32F3x0 User Manual
273
Mode Selection
Source
Selection
Polarity Selection
Filter and Prescaler
mode)
101: CI0FE0
110: CI1FE1
111: ETIFP
configure the ETP for
polarity selection and
inversion.
Filter by ETFC and
Prescaler by ETPSC.
Exam1
Restart mode
The counter can
be clear and
restart when a
rising trigger
input.
TRGS[2:0]=3’b0
00
ITI0 is the
selection.
For ITI0, no polarity
selector can be used.
For the ITI0, no filter and
prescaler can be used.
Figure 16-22. Restart mode
TIMER_CK
CEN
CNT_REG
94 95 96 97 98 99
0 1 2 3 4
0 1 2
UPIF
ITI0
TRGIF
Internal sync delay
Exam2
Pause mode
The counter can
be paused when
the trigger input is
low.
TRGS[2:0]=3’b1
01
CI0FE0 is the
selection.
TI0S=0(Non-xor)
[CH0NP==0, CH0P==0]
no inverted. Capture will
be sensitive to the rising
edge only.
Filter is bypass in this
example.
Figure 16-23. Pause mode
TIMER_CK
CEN
CNT_REG
94
95 96 97 98
CI0
TRGIF
CI0FE0
99
Exam3
Event mode
The counter will
start to count
when a rising
TRGS[2:0]=3’b1
11
ETIF is the
selection.
ETP = 0 no polarity
change.
ETPSC = 1, divided by 2.
ETFC = 0, no filter