GigaDevice Semiconductor GD32F3x0 - Figure 18-12. 8-Bit Format USART Synchronous Waveform (CLEN=1); Figure 18-13. Irda SIR ENDEC Module

GD32F3x0 User Manual
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Figure 18-12. 8-bit format USART synchronous waveform (CLEN=1)
CK pin(CPL=1, CPH=0)
CK pin (CPL=0, CPH=1)
CK pin (CPL=1, CPH=1)
Master data output
Master data input
frame data (8bit)
Idle Idle
Start
Stop
bit4 bit5 bit6 bit7bit0 bit1 bit2 bit3
bit4 bit5 bit6 bit7bit0 bit1 bit2 bit3
CK pin (CPL=0, CPH=0)
18.3.10. IrDA SIR ENDEC mode
The IrDA mode is enabled by setting the IREN bit in USART_CTL2. The LMEN, STB[1:0],
CKEN bits in USART_CTL1 and HDEN, SCEN bits in USART_CTL2 should be cleared in
IrDA mode.
In IrDA mode, the USART transmission data frame is modulated in the SIR transmit encoder
and transmitted to the infrared LED through the TX pin. The SIR receive decoder receives
the modulated signal from the infrared LED through the RX pin, and puts the demodulated
data frame to the USART receiver. The baud rate should not be larger than 115200 for the
encoder.
Figure 18-13. IrDA SIR ENDEC module
Normal
USART
Transmit
Encoder
Receive
Decoder
SIR MODULE
TX
RX
TX pin
RX pin
IREN
1
0
0
1
Infrared
LED
Outside chip
Inside chip
In IrDA mode, the polarity of the TX and RX pins is different. The TX pin is usually at low
state, while the RX pin is usually at high state. The IrDA pins keep stable to represent the
logic ‘1’, while an infrared light pulse on the IrDA pins (a Return to Zero signal) represents the
logic ‘0’. The pulse width should be 3/16 of a bit period. The IrDA could not detect any pulse if