GigaDevice Semiconductor GD32F3x0 - Table 1-1. Memory Map of Gd32 F3 X0 Series

GD32F3x0 User Manual
26
Cortex
®
-M4 processor to reduce the software complexity of repeated implementation of
different device vendors. However, some regions are used by the Arm
®
Cortex
®
-M4 system
peripherals. Table 1-1. Memory map of GD32F3x0 series shows the memory map of
GD32F3x0 series, including Code, SRAM, peripheral, and other pre-defined regions (For the
memory map of the specific device, please refer to the data sheet of the corresponding
device). Each peripheral of either type is allocated 1KB of space. This allows simplifying the
address decoding for each peripheral.
Table 1-1. Memory map of GD32F3x0 series
Pre-defined
Regions
Bus
ADDRESS
Peripherals
0xE000 0000 - 0xE00F FFFF
Cortex M4 internal peripherals
External Device
0xA000 0000 - 0xDFFF FFFF
Reserved
External RAM
0x6000 0000 - 0x9FFF FFFF
Reserved
Peripherals
AHB1
0x5004 0000 - 0x5FFF FFFF
Reserved
0x5000 0000 - 0x5003 FFFF
USBFS
AHB2
0x4800 1800 - 0x4FFF FFFF
Reserved
0x4800 1400 - 0x4800 17FF
GPIOF
0x4800 1000 - 0x4800 13FF
Reserved
0x4800 0C00 - 0x4800 0FFF
GPIOD
0x4800 0800 - 0x4800 0BFF
GPIOC
0x4800 0400 - 0x4800 07FF
GPIOB
0x4800 0000 - 0x4800 03FF
GPIOA
AHB1
0x4002 4400 - 0x47FF FFFF
Reserved
0x4002 4000 - 0x4002 43FF
TSI
0x4002 3400 - 0x4002 3FFF
Reserved
0x4002 3000 - 0x4002 33FF
CRC
0x4002 2400 - 0x4002 2FFF
Reserved
0x4002 2000 - 0x4002 23FF
FMC
0x4002 1400 - 0x4002 1FFF
Reserved
0x4002 1000 - 0x4002 13FF
RCU
0x4002 0400 - 0x4002 0FFF
Reserved
0x4002 0000 - 0x4002 03FF
DMA
APB2
0x4001 8000 - 0x4001 FFFF
Reserved
0x4001 5C00 - 0x4001 7FFF
Reserved
0x4001 5800 - 0x4001 5BFF
Reserved
0x4001 4C00 - 0x4001 57FF
Reserved
0x4001 4800 - 0x4001 4BFF
TIMER16
0x4001 4400 - 0x4001 47FF
TIMER15
0x4001 4000 - 0x4001 43FF
TIMER14
0x4001 3C00 - 0x4001 3FFF
Reserved
0x4001 3800 - 0x4001 3BFF
USART0
0x4001 3400 - 0x4001 37FF
Reserved