GigaDevice Semiconductor GD32F3x0 - Port Output Control Register (Gpiox_Octl, X=A; Port Bit Operate Register (Gpiox_Bop, X=A

GD32F3x0 User Manual
138
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ISTAT15
ISTAT14
ISTAT13
ISTAT12
ISTAT11
ISTAT10
ISTAT9
ISTAT8
ISTAT7
ISTAT6
ISTAT5
ISTAT4
ISTAT3
ISTAT2
ISTAT1
ISTAT0
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
r
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
ISTATy[15:0]
Port input status (y=0..15)
These bits are set and cleared by hardware.
0: Input signal low
1: Input signal high
7.4.6. Port output control register (GPIOx_OCTL, x=A..D,F)
Address offset: 0x14
Reset value: 0x0000 0000
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
Reserved
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
OCTL15
OCTL14
OCTL13
OCTL12
OCTL11
OCTL10
OCTL9
OCTL8
OCTL7
OCTL6
OCTL5
OCTL4
OCTL3
OCTL2
OCTL1
OCTL0
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
rw
Bits
Fields
Descriptions
31:16
Reserved
Must be kept at reset value
15:0
OCTLy[15:0]
Port output control (y=0..15)
These bits are set and cleared by software.
0: Pin output low
1: Pin output high
7.4.7. Port bit operate register (GPIOx_BOP, x=A..D,F)
Address offset: 0x18
Reset value: 0x0000 0000
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit).
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
CR15
CR14
CR13
CR12
CR11
CR10
CR9
CR8
CR7
CR6
CR5
CR4
CR3
CR2
CR1
CR0