GigaDevice Semiconductor GD32F3x0 - Table of Contents

GD32F3x0 User Manual
2
Table of Contents
Table of Contents ........................................................................................................... 2
List of Figures .............................................................................................................. 15
List of Table .................................................................................................................. 21
1. System and memory architecture ........................................................................ 23
1.1. Arm
®
Cortex
®
-M4 processor ......................................................................................... 23
1.2. System architecture ....................................................................................................... 24
1.3. Memory map ................................................................................................................... 25
1.3.1. Bit-banding ............................................................................................................................ 28
1.3.2. On-chip SRAM memory ........................................................................................................ 28
1.3.3. On-chip Flash memory ......................................................................................................... 29
1.4. Boot configuration ......................................................................................................... 29
1.5. I / O compensation cell .................................................................................................. 30
1.6. System configuration registers (SYSCFG) ................................................................. 31
1.6.1. System configuration register 0 (SYSCFG_CFG0) .............................................................. 31
1.6.2. EXTI sources selection register 0 (SYSCFG_EXTISS0) ...................................................... 32
1.6.3. EXTI sources selection register 1 (SYSCFG_EXTISS1) ...................................................... 33
1.6.4. EXTI sources selection register 2 (SYSCFG_EXTISS2) ...................................................... 34
1.6.5. EXTI sources selection register 3 (SYSCFG_EXTISS3) ...................................................... 36
1.6.6. System configuration register 2 (SYSCFG_CFG2) .............................................................. 37
1.6.7. I / O compensation control register (SYSCFG_CPSCTL) .................................................... 38
1.7. Device electronic signature .......................................................................................... 39
1.7.1. Memory density information .................................................................................................. 39
1.7.2. Unique device ID (96 bits) .................................................................................................... 39
2. Flash memory controller (FMC) ............................................................................ 41
2.1. Overview ......................................................................................................................... 41
2.2. Characteristics ............................................................................................................... 41
2.3. Function overview.......................................................................................................... 41
2.3.1. Flash memory architecture ................................................................................................... 41
2.3.2. Read operations ................................................................................................................... 42
2.3.3. Unlock the FMC_CTL register .............................................................................................. 42
2.3.4. Page erase ............................................................................................................................ 42
2.3.5. Mass erase ........................................................................................................................... 43
2.3.6. Main flash programming ....................................................................................................... 45
2.3.7. Option byte erase ................................................................................................................. 46
2.3.8. Option byte programming ..................................................................................................... 47