GigaDevice Semiconductor GD32F3x0 - Figure 19-13. Programming Model for Master Receiving Mode Using Solution B (10-Bit Address Mode)

GD32F3x0 User Manual
496
Figure 19-13. Programming model for master receiving mode using solution B (10-bit
address mode)
IDLE
Master generates START
condition
Master sends Address
Slave sends Acknowledge
Master sends Header
Slave sends Acknowledge
SCL stretched by master
Slave sends DATA(1)
Master sends Acknowledge
（Data transmission）
Slave sends DATA(N)
Master dont send Ack
Master generates STOP
condition
1) Software initialization
Set ADD10SEND
4) Clear ADD10SEND
Set ADDSEND
4) Clear ADDSEND
Set RBNE
Set RBNE and BTC
6) Read DATA(N-3)
Set RBNE
5) Read DATA(1)
Slave sends DATA(N-1)
Master sends Acknowledge
Set RBNE
8) Read DATA(N-2)
I2C Line State Hardware Action
Software Flow
2) Set START
Set SBSEND
SCL stretched by master
3) Clear SBSEND
SCL stretched by master
4) Set START
Master generates repeated
START condition
Set SBSEND
4) Clear SBSEND
SCL stretched by master
Master sends Header
Slave sends Acknowledge
Set ADDSEND
4) Clear ADDSEND
SCL stretched by master
7) Clear ACKEN
Slave sends DATA(N-2)
Master sends Acknowledge
SCL stretched by master
Set RBNE and BTC
8) Read DATA(N-1)
7) Set STOP
SCL stretched by master
9) Read DATA(N)
19.3.8. SCL line stretching
The SCL line stretching function is designed to avoid overflow error in reception and
underflow error in transmission. As is shown in Programming Model, when the TBE and BTC
bits are set in transmitting mode, the transmitter stretches the SCL line low until the transfer
buffer register is filled with the next data to be transmitted. When the RBNE and BTC bits are
set in receiving mode, the receiver stretches the SCL line low until the data in the transfer
buffer is read out.