GigaDevice Semiconductor GD32F3x0 - Alternate Function Selected Register 0 (Gpiox_Afsel0, X=A,B,C)

GD32F3x0 User Manual
140
7.4.9. Alternate function selected register 0 (GPIOx_AFSEL0, x=A,B,C)
Address offset: 0x20
Reset value: 0x0000 0000
This register can be accessed by byte(8-bit), half-word(16-bit) and word(32-bit)
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
16
SEL7[3:0]
SEL6[3:0]
SEL5[3:0]
SEL4[3:0]
rw
rw
rw
rw
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
SEL3[3:0]
SEL2[3:0]
SEL1[3:0]
SEL0[3:0]
rw
rw
rw
rw
Bits
Fields
Descriptions
31:28
SEL7[3:0]
Pin 7 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
27:24
SEL6[3:0]
Pin 6 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
23:20
SEL5[3:0]
Pin 5 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
19:16
SEL4[3:0]
Pin 4 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
15:12
SEL3[3:0]
Pin 3 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
11:8
SEL2[3:0]
Pin 2 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
7:4
SEL1[3:0]
Pin 1 alternate function selected
These bits are set and cleared by software.
Refer to SEL0[3:0] description
3:0
SEL0[3:0]
Pin 0 alternate function selected
These bits are set and cleared by software.
0000: AF0 selected (reset value)
0001: AF1 selected
0010: AF2 selected