GD32F3x0 User Manual
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8.3. Function overview
CRC management unit is used to calculate the 32-bit raw data, and CRC_DATA register
will receive the raw data and store the calculation result.
- If do not clear the CRC_DATA register by software setting CRC_CTL register, the
new input raw data will calculate based on the result of previous value of
CRC_DATA.
- CRC calculation will spend 4/2/1 AHB clock cycles for 32/16/8(7) bit data size,
during this period AHB will not be hanged because of the existence of the 32bit
input buffer.
This module supplies an 8-bit free register CRC_FDATA.
– CRC_FDATA is unrelated to the CRC calculation, any value you write in will be
read out at anytime.
Reversible function can reverse the input data and output data.
For input data, 3 reverse types can be selected.
Original data is 0x3456CDEF:
1) byte reverse:
32-bit data is divided into 4 groups and reverse implement in group inside. Reversed
data: 0x2C6AB3F7
2)half-word reverse:
32-bit data is divided into 2 groups and reverse implement in group inside. Reversed
data: 0x6A2CF7B3
3)word reverse:
32-bit data is divided into 1 groups and reverse implement in group inside. Reversed
data: 0xF7B36A2C
For output data, reverse type is word reverse.
For example: when REV_O=1, calculation result 0x3344CCDD will be converted to
0xBB3322CC.
User configurable initial calculation data is available.
- When RST bit is set or write operation to CRC_IDATA register, the CRC_DATA
register will be automatically initialized to the value in CRC_IDATA.
User configurable polynomial.
Depends on PS[1:0] bits, the valid polynomial and output bit width can be selected by
user. If the polynomial is less than 32 bit, the high bits of the input data and output data
is unavailable. It is strongly recommend resetting the CRC management unit after
change the PS[1:0] bits or polynomial.
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