GD32F3x0 User Manual
461
is signaled by the RBNE interrupt. If DMA is used to read from the smartcard in block mode,
the DMA must be enabled only after the first character is received.
In order to allow the automatic check of the maximum wait time between two consecutive
characters, the USART_RT register must be programmed to the CWT (character wait time) -
11 value, which is expressed in baudtime units, after the reception of the first character
(RBNE interrupt). The USART signals to the software through the RT flag and interrupt
(when RTIE bit is set), if the smartcard doesn’t send a new character in less than the CWT
period after the end of the previous character.
The USART uses a block length counter, which is reset when the USART is transmitting
(TBE=0), to count the number of received characters. The length of the block, which must be
programmed in the BL[7:0] bits in the USART_RT register, is received from the smartcard in
the third byte of the block (prologue field). This register field must be programmed to the
minimum value (0x0), before the start of the block, when using DMA mode. With this value,
an interrupt is generated after the 4th received character. The software must read the third
byte as block length from the receive buffer.
In interrupt driven receive mode, the length of the block may be checked by software or by
programming the BL value. However, before the start of the block, the maximum value of BL
(0xFF) may be programmed. The real value will be programmed after the reception of the
third character.
The total block length (including prologue, epilogue and information fields) equals BL+4. The
end of the block is signaled to the software through the EBF flag and interrupt (when EBIE bit
is set). The RT interrupt may occur in case of an error in the block length.
Direct and inverse convention
The smartcard protocol defines two conventions: direct and inverse.
The direct convention is defined as: LSB first, logical bit value of 1 corresponds to high state
of the line and parity is even. In this case, the following control bits must be programmed:
MSBF=0, DINV=0 (default values).
The inverse convention is defined as: MSB first, logical bit value 1 corresponds to an low
state on the signal line and parity is even. In this case, the following control bits must be
programmed: MSBF=1, DINV=1.
18.3.13. ModBus communication
The USART offers basic support for the implementation of ModBus/RTU and ModBus/ASCII
protocols by implementing an end of block detection.
In the ModBus/RTU mode, the end of one block is recognized by an idle line for more than 2
characters time. This function is implemented through the programmable timeout function.
To detect the idle line, the RTEN bit in the USART_CTL1 register and the RTIE in the
To Next Page
Loading...
