Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 89
Power Management and Reset Interface—Intel
®
EP80579 Integrated Processor Product Line
7.3.1.3.1 Normal State (C0)
This is the normal operating state for the IA-32 core.
7.3.1.3.2 AutoHALT Powerdown State (C1)
AutoHALT is a low-power state entered when the IA-32 core executes the HALT
instruction. The IA-32 core will transition to the Normal state upon the occurrence of
SMI#, INIT#, LINT[1:0](NMI, INTR), or FSB interrupt message. RESET# will cause the
IA-32 core to immediately initialize itself.
A system management interrupt (SMI) handler will return execution to either Normal
state or the AutoHALT Powerdown state.
The system can generate a STPCLK# while the IA-32 core is in the AutoHALT
Powerdown state. When the system deasserts the STPCLK# interrupt, the IA-32 core
will return execution to the HALT state.
While in AutoHALT Powerdown state, the IA-32 core will process bus snoops and
interrupts.
7.3.1.3.3 Stop-Grant State (C2)
When the STPCLK# pin is asserted, the Stop-Grant state of the IA-32 core is entered
20 bus clocks after the response phase of the IA-32 core-issued Stop Grant
Acknowledge special bus cycle.
SYS_RESET# will cause the IA-32 core to immediately initialize itself, but the IA-32
core will stay in Stop-Grant state. A transition back to the Normal state will occur with
the de-assertion of the STPCLK# signal. When re-entering the Stop-Grant state from
the Sleep state, STPCLK# should be deasserted ten or more bus clocks after the de-
assertion of SLP#.
A transition to the HALT/Grant Snoop state will occur when the IA-32 core detects a
snoop on the FSB (see Section 7.3.1.3.4). A transition to the Sleep state (see
Section 7.3.1.3.5) will occur with the assertion of the SLP# signal.
Figure 51. Clock Control States
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