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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”Gigabit Ethernet (GbE) Interface
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
211 Order Number: 320068-005US
Table 80. GBEn Pin Table (Sheet 1 of 4)
GBEn Signal Name
Pin
Type
Pin
Count
Description
Note:
โ€ข GBE Port 0 supports Wake-On-LAN (WOL); hence GBE Port 0 Block resides in the Sustain Power Well within
EP80579. It is required that all GBE Port 0 (Transmit/Receive) interface signals on the platform be powered
by GBE Standby Voltage. GBE Port 1&2 should be powered by GBE core power.
GBEn_TxCLK
O1
RGMII Mode of Operation:
โ€ข The signal name is GBEn_TxCLK.
โ€ข This signal is the transmit reference clock and will be 125 MHz,
25 MHz, or 2.5 MHz +- 50ppm depending on speed. GBEn_TxCLK is
connected to the PHY GTXn_CLK input
โ€” 125 MHz when operating at 1000Base-X speeds
โ€” 25 MHz when operating at 100Base-X speeds
โ€” 2.5 MHz when operating at 10Base-X speeds
โ€ข Pull up GBE Port 0 Transmit Clock signal to EP80579 2.5V Standby
Voltage (VCCSUS25) using a 1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Transmit Clock signals to GBE 2.5V using a 1.2Kฮฉ
ยฑ 5% resistors.
โ€ข Leave signals of any unused Port as no connect.
N/A N/A
RMII Mode of Operation:
โ€ข Not used in RMII mode of operation and is a no connect.
GBEn_TxCTL
O1
RGMII Mode of Operation:
โ€ข The signal name is GBEn_TXEN when the interface is configured to
operate in RGMII mode of operation.
โ€ข GBEn_TXEN indicates that the MAC has valid data being transmitted
on the GBEn_TXDATA[3:0] signals. GBEn_TXEN shall be asserted
synchronously with the first nibble of the preamble and shall remain
asserted until all data bits are presented on the GBEn_TXDATA[3:0]
signals. GBEn_TXEN shall be negated prior to the first GBEn_REFCLK
rising edge following the final nibble of a frame. GBEn_TXEN shall
transition synchronously with respect to GBEn_REFCLK.
โ€ข Pull up GBE Port 0 Transmit Control signal to EP80579 2.5V Standby
Voltage (VCCSUS25) using a 1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Transmit Control signals to GBE 2.5V using a
1.2Kฮฉ ยฑ 5% resistors.
โ€ข Leave signals of any unused Port as no connect.
O1
RMII Mode of Operation:
โ€ข The signal name is GBEn_TXEN when the interface is configured to
operate in RMII mode of operation.
โ€ข GBEn_TXEN indicates that the MAC has valid data being transmitted
on the GBEn_TXDATA[1:0] signals. GBEn_TXEN shall be asserted
synchronously with the first two bits of the preamble and shall remain
asserted until all data bits are presented on the GBEn_TXDATA[1:0]
signals. GBEn_TXEN shall be negated prior to the first GBEn_REFCLK
rising edge following the final two bits of a frame. GBEn_TXEN shall
transition synchronously with respect to GBEn_REFCLK.
โ€ข Pull up GBE Port 0 Transmit Control signal to EP80579 3.3V Standby
Voltage (VCCGBEPSUS) using a 1.2Kฮฉ ยฑ 5% resistor.
โ€ข Pull up GBE Port 1&2 Transmit Control signals to GBE 3.3V using a
1.2Kฮฉ ยฑ 5% resistors.
โ€ข Leave signals of any unused Port as no connect.

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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