Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 191
Low Pin Count (LPC) InterfaceโIntel
ยฎ
EP80579 Integrated Processor Product Line
ยตATX chassis, the area behind the memory is positioned behind the disk drives when
installed in a tower chassis. Drive bays or cables will make physical access to the TPM
more difficult than if it was left out in the open portions of the motherboard.
14.4 Firmware Hub (FWH) Guidelines
The following sections provide general guidelines for compatibility and design when
supporting the FWH device. The majority of the changes will be incorporated in the
BIOS.
14.4.1 FWH and Flash BIOS Vendors
The following vendors manufacture firmware hubs that meet Intel requirements:
SST*: http://www.ssti.com
STM*: http://us.st.com/stonline
ATMEL*: http://www.atmel.com
Note: Contact the vendor directly for information on packaging and density.
14.4.2 FWH Decoupling
A 0.1 ฮผF capacitor must be placed between the VCC supply pins and the VSS ground
pins to decouple high frequency noise, which may affect the programmability of the
device. Additionally, a 4.7 ฮผF capacitor must be placed between the VCC supply pins
and the VSS ground pins to decouple low frequency noise. The capacitors must be
placed no further than 390 mils from the VCC supply pins.
14.4.3 FWH INIT# Voltage Compatibility
The FWH INIT# signal trip points need to be considered because they are NOT
consistent among different FWH manufacturers. The INIT# signal is active-low.
Therefore, the inactive state of the EP80579 INIT33V# signal needs to be at a slightly
higher value than the V
IH
min FWH INIT# pin specification. The EP80579 inactive state
for this signal is typically governed by the following formula:
I/O power well minimum โ noise margin
For example, if the minimum voltage in the I/O power well of the processor is 1.6V, the
noise margin is 200 mV and the V
IH
min spec of the FWH INIT# input signal is 1.35V,
there would be no compatibility issue (because 1.6V โ 0.2V = 1.40V, which is greater
than the 1.35V minimum of the FWH). If the V
IH
min of the FWH was 1.45V, there
would be an incompatibility and logic translation (see Section 14.4.4) would need to be
used.
Note: These examples do not take into account actual noise that may be encountered on
INIT#. Care must be taken to ensure that the V
IH
min specification is met with ample
noise margin.
14.4.4 FWH V
PP
Design Guidelines (Optional)
The V
PP
pin on the FWH is used for programming the flash cells. The FWH supports V
PP
of 3.3V or 12V. If V
PP
is 12V, the flash cells will program about 50% faster than at 3.3V.
However, the FWH only supports a V
PP
of 12V for 80 hours (3.3V on Vpp does not affect