Intel
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EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 55
High-Speed Design ConcernsโIntel
ยฎ
EP80579 Integrated Processor Product Line
compensate for package-induced skew, the signals lengths in the same group are
adjusted by the exact amount of Package Length Compensation (PLC). Equation
1defines PLC for a particular signal. Signal X is any signal in the group that does not
have the longest package length. The PLC is realized by adding equal length PCB trace
for signal X.
Equation 1. Package Length Compensation (PLC) Definition
Every time a signal changes interconnect or layer, there is an effect on flight time. The
most effective way to calculate flight time is to break up each signal into segments of
constant flight time, analyze those segments, and then add the segments together.
Flight time is trace length divided by a constant trace velocity.
Equation 2. Flight Time
To determine the total flight time, each segment with a constant trace velocity must be
identified. These segments are commonly defined at component interconnects. For
example, a signal that connects two different components through a PCB would be
calculated as follows:
Using the segment lengths and velocities yields:
SignalX
PLC
= Maximum_Signal_in_Group
Package Length
SignalX
Package Length
flight_time =
trace_length
trace_velocity
Total_Signal
Flight Time
= Signal
Component Flight Time
+ Signal
PCB Flight Time
+
Signal
Component2 Flight Time
Figure 30. Total Signal Length with Two Components
component1_trace_length
PCB_trace_length
component2_trace_length
component
pins