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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”System Memory Interface (SODIMM)
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
320 Order Number: 320068-005US
A.4.2 Package Length Compensation
Package length compensation is required for total routing length requirements, see the
length matching rules listed in Table A-5, โ€œLength Matching Formulas between EP80579
and DDR2 SODIMMโ€ on page 320. See the DDR2 package length information in the
Intel
ยฎ
EP80579 Integrated Processor Product Line Datasheet.
A.4.3 Length Matching and Length Formulas
The routing guidelines presented in the following subsections define the recommended
routing topologies, trace width, spacing geometries, and absolute minimum and
maximum routed lengths for each signal group. These guidelines are recommended to
achieve optimal signal integrity and timing.
A.4.4 DDR2 Interface System Interconnect
Figure A-1 provides a block diagram of the system interconnect between the EP80579
DDR2 Memory Controller and the SODIMM for the signal groups provided in Table A-4.
The Command/Address and Control signals require external terminations. External
terminations are not required for DQ and DQS signals since both the EP80579 and the
SDRAMs contain internal ODT. The following sections provide the detailed topology and
routing guidelines for each of the signal groups.
Table A-5. Length Matching Formulas between EP80579 and DDR2 SODIMM
Source/
Destination
Signal Group to matching
signal
Total Length Matching Tolerances Notes
EP80579 Pad to
DDR2 SODIMM
DQS to DQ/DM
Min DQS = Min(DQ/DM) - 200 mils
Max DQS = Max(DQ/DM) - 200 mils
1, 2
DQS to clock DQS = CLK/CLK# ยฑ 500 mils 2
CMD/ADD to Clock CMD/ADD = CLK/CLK# ยฑ 20 mils 2
CTRL to CMD/ADD
Total CTRL Length = Total (CMD/ADD
Length) + 3.0 inches
2
Clock to Clock# CLK[x] = CLK[x]# ยฑ10 mils 2
Notes:
1. Length matching is only required within each Byte lane. Signal length matching is not required
outside the Byte lane. For example, any signal within DQ [0:7] need not be length matched to DQS
[3].
2. Total length means - L
PKG
+ L
BREAK
+ L
ROUTE

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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