Intel
ยฎ
EP80579 Integrated Processor Product LineโSystem Memory Interface (SODIMM)
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
330 Order Number: 320068-005US
A.4.6.2 DDR_CRES1, DDR_CRES2
The EP80579 provides the DDR_CRES1 and DDR_CRES2 signals as additional
compensation resistors (See Figure A-7). Intel recommends 20 mil wide traces with a
minimum spacing of 12 mils from other signals. When breaking out from the EP80579,
maintain a minimum spacing of 4.5 mils spacing up to a maximum length of 500 mils.
For the best signal integrity, minimize this length as much as possible.
Figure A-6. DDR_SLWCRES, DDR_RCOMPX, DDV_CRES, & DDR_CRES0 Routing Topology
DDR_RCOMPX
249 ฮฉ, 1%
825
ฮฉ, 1%
DDR_CRES0
DRV_CRES
DDR_SLWCRES
825 ฮฉ, 1%
Figure A-7. DDR_CRES1 and DDR_CRES2 Signal Connections
DDR_CRES2
DDR_CRES1
VCC18
0.1uF
100
ฮฉ
1 %
100
ฮฉ
1 %