Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 81
System Power Delivery Guide—Intel
®
EP80579 Integrated Processor Product Line
• Power dissipation results from drain to source resistance (R
DS-ON
) DC losses across
the bottom synchronous MOSFET.
• Power dissipation occurs through the magnetic core and windings of the main
power inductor.
Significant improvement have been made in the switching MOSFET technology to lower
gate charge of the control MOSFET, allowing them to switch faster and reduce switching
losses. Improvements in lowering the R
DS(ON)
parametric of the synchronous MOSFET
have resulted in reduced DC losses. Also, the direct current resistance (DCR) of the
power inductor has been reduced to lower the amount of power dissipation in the
circuit’s magnetic core and windings.
These technology improvements by themselves are not sufficient to effectively remove
the heat generated during the high current demand and tighter voltage regulation
required by today’s processors. There are several mechanisms for effectively removing
heat from the package of these integrated devices. Some of the most common
methods are as follows:
• Attach a heat spreader or heat pipe to the package with a low thermal co-efficient
bonding material.
• Add and/or increase the copper fill area attached to high current carrying leads.
• Add or re-direct air flow to flow across the device.
• Utilize multiple devices in parallel, as allowed, to reduce package power dissipation.
• Utilize newer/enhanced technology and devices to lower heat generation, with
equal or better performance.
For the system designer, these options are not always available or economically
feasible. The most effective method of thermal spreading and heat removal, from these
devices, is to generate airflow across the package and add copper fill area to the
current carrying leads of the package.
6.7 Decoupling Recommendations
This section details the decoupling required by the EP80579.
6.7.1 VCCVC (IA-32 core Power) Decoupling
Care must be taken to reduce the loop inductance for the whole delivery path.
• Two 330 µF±20%, 4V (TANT) capacitors are recommended as bulk decoupling for
IA-32 core power plane.
• Two 150 µF±20%, 4V, ESR (45 m
Ωmax) capacitors are recommended as bulk
decoupling for IA-32 core power plane.
• Fifteen 10 µF,±20% 6.3V X5R capacitors are recommended.
6.7.2 VCC (1.2V Core Logic) Decoupling
• Two 150 µF±20%, 4V, ESR (45 mΩmax) capacitors are recommended as bulk
decoupling for core logic power plane.
• Twenty 10 µF,±20% 6.3V X5R capacitors are recommended.
• Five 0.1 µF ±10% 16V X7R capacitors are recommended.
6.7.3 VCCA[2:1] (1.2V, IA-32 core PLL Power) Decoupling
• Two 0.1 µF ±10%, 16V X7R capacitors are recommended.

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English