Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line—Gigabit Ethernet (GbE) Interface
Intel
®
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
223 Order Number: 320068-005US
Figure 140. GbE RGMII Receive Path Clock Topology
V2P5
Via
Break in
Break out Board
Receiver
Clock
PHY
EP80579
LCLK_Brk_in_rx LCLK_Brd_route_rxLCLK_Brk_out_rx
L
Pull_up
LCLK_Brk_out_rx + LCLK_Brd_route_rx + LCLK_Brk_in_rxLCLK_Total_rx =
NOTE: Breakout\ Breakin descriptions are as follows:
1. Routing where trace is 3.75 mil wide and 4mil spacing is implemented to escape\ enter BGA
2. The Breakout \ Breakin Length is defined from the pin of the BGA, to where 4 mil spacing
increases to the required spacing per SI recommendations.
a). Clock = 20 mil edge-to-edge (e2e) for Stripline
b). Clock = 25 mil edge-to-edge (e2e) for Microstrip
Transmitter
Clock
Via
RGMII Receive Path Clock Topology
(EP80579 PHY)
Pull Up
TL (μs)
Rpull up

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English