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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Lineโ€”Serial ATA (SATA) Interface
Intel
ยฎ
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
162 Order Number: 320068-005US
11.8 Terminating Unused SATA Interface
If an SATA port will not be implemented on the platform, the SATA_RXp[x],
SATA_RXn[x], SATA_TXp[x], and SATA_TXn[x] signals may be left unconnected. โ€˜xโ€™ is
the port number not being used.
If the SATA interface will not be implemented on the platform (i.e., no ports will be
used), designers must take the following actions:
โ€ข Terminate SATA Bias and clocks as follows:
โ€” Tie SATA_RBIAS and SATA_RBIAS# together and connect through a
24.9ฮฉ ยฑ1%
resistor to ground.
โ€” Connect SATA_CLKREFp/SATA_CLKREFn to a 100 MHz clock source.
โ€ข The following signals can be left as no connects:
Figure 107. Example of Poor Host Connector Placement
Figure 108. Minimum Host Connector Placement Spacing (From SATA Specification)
4.00 mm
0.90 mm
16.00 mm
3.64 mm
15.20 mm
7.00 mm
4.00 mm
0.90 mm
16.00 mm
3.64 mm
15.20 mm
7.00 mm

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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