Intel EP80579 Guide

Intel
®
EP80579 Integrated Processor Product Line—Gigabit Ethernet (GbE) Interface
Intel
®
EP80579 Integrated Processor Product Line
Platform Design Guide May 2010
219 Order Number: 320068-005US
Figure 138. GbE RGMII Transmit Path Clock Topology
Pull_Up
TL (μs)
V2P5
Via
Break out
Break in Board
Transmitter
(Clock)
PHY
EP80579
Rpull_up
LCLK_Brk_out_tx LCLK_Brd_route_tx LCLK_Brk_in_tx
L
Pull_up
LCLK_Brk_out_tx + LCLK_Brd_route_tx + LCLK_Brk_in_txLCLK_Total_tx =
NOTE: Breakout\ Breakin descriptions are as follows:
1. Routing where trace is 3.75 mil wide and 4mil spacing is implemented to escape\ enter BGA
2. The Breakout \ Breakin Length is defined from the pin of the BGA, to where 4 mil spacing
increases to the required spacing per SI recommendations.
a). Clock = 20 mil edge-to-edge (e2e) for Stripline
b). Clock = 25 mil edge-to-edge (e2e) for Microstrip
Receiver
(Clock)
Via
RGMII Transmit Path Clock Topology
(EP80579 PHY)

Intel EP80579 Specifications

General

Brand	Intel
Model	EP80579
Category	Computer Hardware
Language	English