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Intel EP80579 Guide

Intel EP80579
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Intel
ยฎ
EP80579 Integrated Processor Product Line May 2010
Order Number: 320068-005US 157
Serial ATA (SATA) Interfaceโ€”Intel
ยฎ
EP80579 Integrated Processor Product Line
11.2.1 SATA Trace Separation
Figure 101 provides an illustration of the recommended trace spacing. Use the
following separation guidelines for the SATA interface:
โ€ข Maintain parallelism between SATA differential signals with the trace spacing
needed to achieve 90 ฮฉ ยฑ10% differential impedance. Deviations will normally
occur due to package breakout and routing to connector pins. Ensure the amount
and length of the deviations are kept as small as possible.
โ€ข Use an impedance calculator to determine the trace width and spacing required for
the specific board stackup being used, keeping in mind that the target is a 90
ฮฉ ยฑ10% differential impedance. For the recommended board stackup parameters,
4.5 mil traces with 5.5 mil spacing in stripline, or 4.75 mil traces with 5.25 mil
spacing in microstrip, the results are in approximately 90 ฮฉ ยฑ10% differential trace
impedance.
โ€ข Based on simulation data, use 20 mil (stripline) minimum, or 25 mil (microstrip)
minimum spacing between the SATA signal pairs and other signal traces for optimal
signal quality. This helps prevent crosstalk.
.
11.2.2 SATA Trace Length Guidelines and Pair Matching
If the trace length of the differential pair is longer than recommended, the high
frequency differential signal will suffer signal attenuation and an increase of rise/fall
time.
SATA signal pair traces must be trace length matched. The difference of two line traces
in a differential pair must be restricted to below 20 mils, but less trace mismatch is
recommended.
Figure 101. SATA Trace Spacing
4.5
4. 5
4. 5 4. 5
20
20
20
Distance in Mils
Note: This illustration is used to convey trace spacing implementation, it does not
reflect any stackup parameters other than trace width
5. 5
5. 5
Differential Pair
Differential Pair
Clock/ High- Speed
Periodic Clock
Low- Speed
Non- Periodic Signal
Stripline
4.75
4. 75
4. 75 4.75
25
25
25
Distance in Mils
Note: This illustration is used to convey trace spacing implementation , it does not
reflect any stackup parameters other than trace width
5.25
5.25
Low- Speed
Non- Periodic Signal
Differential Pair Differential Pair
Cl ock/High- Speed
Periodic Clock
Mi cr ost r i p

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Intel EP80579 Specifications

General IconGeneral
BrandIntel
ModelEP80579
CategoryComputer Hardware
LanguageEnglish

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